1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same and, more particularly, a semiconductor device in which semiconductor chips, etc. are three-dimensionally packaged and a method of manufacturing the same.
2. Description of the Related Art
The development of the LSI technology as a key technology to implement multimedia devices is proceeding steadily to a higher speed and a larger capacity of the data transmission. According to this, a higher density of the packaging technology as interfaces between the LSI and electronic devices is also proceeding.
In reply to the request of further higher density, the multichip package (semiconductor device) in which a plurality of semiconductor chips are laminated three-dimensionally on the substrate and packaged has been developed. As an example, in Patent Application Publication (KOKAI) 2001-196525 (Patent Literature 1), Patent Application Publication (KOKAI) 2001-177045 (Patent Literature 2), and Patent Application Publication (KOKAI) 2000-323645 (Patent Literature 3), the semiconductor device having the structure in which a plurality of semiconductor chips are laminated on the wiring substrate is set forth.
In recent years, in such multichip package, there is such a request that an overall thickness should be reduced. Therefore, individual semiconductor chips must be formed as thin as possible and be packaged.
As the related art 1 to get the thinned semiconductor chip, first a thickness of the semiconductor wafer is reduced up to 100 μm or less, for example, by grinding the back surface of the semiconductor wafer by means of the grinder in a state that the first protection tape is adhered onto the element formation surface of the semiconductor wafer on which predetermined elements are formed to support. Then, the grinding surface of the semiconductor wafer is adhered onto the second protection tape and then the first protection tape is stripped off from the semiconductor wafer. Then, individual thinned semiconductor chips are obtained by applying the dicing to the semiconductor wafer on the second protection tape.
Also, as the related art 2, first a rigid glass substrate is adhered onto the element formation surface of the semiconductor wafer, and then a thickness of the semiconductor wafer is reduced by grinding the back surface of the semiconductor wafer by virtue of the grinder. Then, the semiconductor wafer is peeled off from the glass substrate, and then individual thinned semiconductor chips are obtained by applying the dicing to the semiconductor wafer.
In addition, as the related art 3, first the element formation surfaces of two semiconductor wafers, on which predetermined elements are formed respectively, are electrically connected via the bump or the like, and then a thickness of one semiconductor wafer is reduced by grinding the back surface of the semiconductor wafer by means of the grinder. Then, individual laminated semiconductor chips are obtained by applying the dicing to two adhered semiconductor wafers.
In the above related art 1, the protection tape does not have the sufficient rigidity. Therefore, the semiconductor wafer is broken when the thinned semiconductor wafer is carried in a state that the semiconductor wafer is adhered onto the first protection tape, or a bowing of the semiconductor wafer is caused by the residual stress of the passivation film, or the like on the semiconductor wafer. Thus, in some cases it is impossible to carry the semiconductor wafer into the housing cassette.
Also, in the above related art 2, since the rigid glass substrate is employed as the supporting body, the disadvantage caused in the wafer conveyance in the related art 1 can be overcome. But it is extremely difficult to peel off the thinned semiconductor wafer from the glass substrate without breakage in a state that the semiconductor wafer is adhered onto the glass substrate.
In addition, in the above related art 3, since any one of the semiconductor wafers is also used as the supporting substrate, there is no necessity to peel off the semiconductor wafer from the supporting substrate. However, since chips of the overall semiconductor wafer are divided into individual pieces and then packaged, it is possible that the defective chips are mixed with the laminated semiconductor chips and thus it is apprehended that yield of manufacture of the semiconductor device is lowered.
Further, in above Patent Literatures 1 to 3, it is set forth merely that the semiconductor chips are laminated three-dimensionally on the substrate. However, no consideration is given to such a structure that a thickness of the overall semiconductor device should be reduced by laminating the thinned semiconductor chips a thickness of each of which is about 150 μm or less, for example.